kernel::bsp::device_driver::bcm::bcm2xxx_pl011_uart

Module FR

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Flag Registers.

Modules§

  • BUSY
    UART busy. If this bit is set to 1, the UART is busy transmitting data. This bit remains set until the complete byte, including all the stop bits, has been sent from the shift register.
  • RXFE
    Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the LCR_H Register.
  • TXFE
    Transmit FIFO empty. The meaning of this bit depends on the state of the FEN bit in the Line Control Register, LCR_H
  • TXFF
    Transmit FIFO full. The meaning of this bit depends on the state of the FEN bit in the LCR_H Register.

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Constants§